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Field Application Engineer

Santa Clara, CA, United States💼 Full-time💰 $150,426–$150,426🗓 2026-09-14 → 2026-09-28

Core

Provide technical leadership and support for Functional Verification technologies to EDA customers in Silicon Valley, integrating DVT products at the block/chip/system level.

Role type

Field Application Engineer (Verification)

Builds

DVT products and services for EDA customers

Domain

Electronic Design Automation (EDA) / Semiconductor Verification

Required skills

SystemVerilog/UVM, Python, Perl, C/C++, HDLs (Verilog/VHDL), SoC architecture analysis, regression debugging, simulator performance tuning

Preferred skills

None stated

Technologies

SystemVerilog, UVM, Python, Perl, C/C++, Verilog, VHDL, SystemC

Responsibilities

Integrate DVT products and services at the block/chip/system level; Perform assessments of customer environments and requirements; Provide expertise on verification planning, testbench development, failure analysis, and coverage analysis; Troubleshoot and debug RTL and verification environments; Analyze semiconductor IC technologies including ASIC and SoC architectures; Deliver customer training and consulting on advanced verification topics.

Seniority

Mid-level, hands-on IC

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