Design Engineer
Core
Develop multiple IPs for Apple SoCs in Storage, Computer Vision, and RISC-V CPU domains, handling micro-architecture definitions, RTL coding, block-level simulations, and synthesis.
Role type
Senior IC VLSI design engineer (SoC/Processor)
Builds
Digital IPs integrated into Apple SoC sub-systems
Domain
Semiconductor / VLSI / CPU Architecture
Required skills
VLSI design of Processor Cores/SoC, RTL coding, micro-architecture definition, block-level simulation, synthesis, STA, scripting (Perl/C/Python/TCL), Clock/Voltage domain crossing, Low Power Design
Preferred skills
Verification methodologies, CPU/ARM instruction set knowledge, backend tools expertise
Technologies
Verilog, System Verilog, RISC-V, ARM, Perl, C, Python, TCL
Responsibilities
Define IP micro-architecture, implement required hardware, synthesize digital design to latest process nodes, integrate IPs into sub-systems, collaborate with physical design and verification teams
Seniority
Senior, hands-on IC
