Wireless RTL Design Engineer
Core
Develop signal processing intensive design for wireless communication SoCs with diverse connectivity technologies.
Role type
Senior RTL Design Engineer (Wireless SoC)
Builds
Wireless System-on-Chip (SoC) silicon
Domain
Wireless communications, VLSI, RTL design
Required skills
RTL logic design, fixed-point arithmetic, bit-true verification, DSP communication algorithms, energy-efficient/low power logic design, microarchitecture definition, MATLAB/C system modeling, lint-free design tool usage
Preferred skills
Front end CAD tools (synthesis, CDC, power analysis)
Responsibilities
Write specifications and documents based on MATLAB/C system models; define microarchitecture; perform RTL logic design and verification support; run tools to ensure lint-free design; collaborate with algorithm and software teams for performance and power efficiency
Seniority
Mid-Senior, hands-on IC
