Experienced Cellular IP Design Engineer (m/f/d)
Core
Developing highly customized hardware IPs for digital signal processing and integrating them into SoCs for Apple devices.
Role type
Senior IC cellular IP design engineer
Builds
Cellular transceiver System on a Chip (SoC) sub-components
Domain
Consumer electronics / Mobile communications / Digital hardware design
Required skills
Digital signal processing principles, Verilog/System Verilog, ASIC/FPGA design, RTL/Netlist analysis, Debugging, Scripting (TCL/Python/Perl), Linux, Revision control
Preferred skills
AMBA/Wishbone bus protocols, SystemC/C++ modeling, High-level synthesis, Machine Learning for hardware optimization
Technologies
Verilog, System Verilog, SystemC, C++, TCL, Python, Perl, Linux, Perforce
Responsibilities
Define and drive implementation, timing closure, and power optimizations for IP sub-components; Collaborate with system, digital, analog, firmware, verification, and physical design teams; Own end-to-end project lifecycle from concept to in-field operation
Seniority
Senior, hands-on IC
