Compiler Circuit Designer
Core
Design memory compiler IP (SRAM, register files, latch arrays) to enable high-performance, low-power ASIC processor designs.
Role type
Senior IC compiler circuit designer
Builds
High-performance, low-power memory blocks for ASICs
Domain
Semiconductor / ASIC Design
Required skills
SRAM compiler IP, register file arrays, latch arrays, IC compilers, design flow, DFT, testing, device physics, process knowledge, team leadership, failure analysis, yield improvement, automation
Preferred skills
High-performance low-power circuit design, industry standard circuit simulation tools, top-level integration tools, ML-based programming algorithms
Technologies
SRAM, register files, latch arrays, IC compilers, DFT tools, simulation tools
Responsibilities
Drive development of SRAM, register files, and latch arrays; Lead SRAM compiler IP requirements to vendors and internal teams; Collaborate with compiler vendors and design teams; Work with logic/architecture teams to capture specifications and drive implementation; Understand complete design flow, DFT, and testing aspects.
Seniority
Senior, hands-on IC
