CareerPlanSign in

Physical Design Engineer

Cupertino, United States of America💼 Full-time💰 $150,400–$150,400🗓 2026-09-17 → 2026-09-28

Core

Drive physical design implementation from netlist to GDS2, ensuring timing closure and manufacturability for logic partitions.

Role type

Senior IC physical design engineer (digital)

Builds

GDS2 layouts for logic partitions meeting schedule and performance goals

Domain

Semiconductor / Digital IC Physical Design

Required skills

Place and Route (PNR) flows, Static Timing Analysis (STA), Electromigration and IR Analysis (EMIR), Physical Design Verification (PDV), Design for Test (DFT), TCL/Python/Perl scripting, EDA tools, RC network analysis

Responsibilities

Complete netlist to GDS2 implementation for partitions, drive signoff closure for physical and electrical verification, resolve design and flow issues, communicate with cross-function teams on pin assignment and floor planning

Seniority

Mid-level, hands-on IC

Sourced via apple · Listed on CareerPlan, which tracks 898,000+ jobs from 20+ sources.