Lead Design Engineer
Core
Developing, automating, and maintaining EDA flows and scripts for physical implementation of ASICs and optimizing PPA for IP cores and soft controllers.
Role type
Lead Design Engineer (Physical Design/Backend)
Builds
Production ASIC chips and IP cores optimized for performance and power on advanced process nodes.
Domain
Semiconductor / EDA / Physical Design
Required skills
Python scripting, Tcl scripting, Full Chip floorplanning, Global clock distribution, Synthesis, Physical Designing, Timing Analysis, Power Analysis, Formal Verification, High frequency design methodologies, AI tools for automation
Preferred skills
Experience with TSMC, Intel, Samsung, or Rapidus foundries, Experience with Soft Controllers, Experience with pin assignment across subsystems
Technologies
Genus, Innovus, Conformal, Litmus, Tempus, Voltus, Certus, Pegasus, AI tools
Responsibilities
Develop TFM to optimize PPA for IP's and Soft Controllers, Manage regression infrastructure that tracks quality of RTL/flow development, Work on automation of Full chip floorplanning using latest AI tools
Seniority
Senior, hands-on IC with leadership responsibilities