Senior Director, Physical Design & Backend Engineering (HPC)
Core
Lead end-to-end backend execution for HPC SoC and MCU programs from RTL to GDS, ensuring on-time silicon delivery and PPA targets.
Role type
Senior Director, Physical Design & Backend Engineering
Builds
High-performance SoC and MCU silicon
Domain
Semiconductor / Hardware Design / HPC
Required skills
End-to-end RTL-to-GDSII flow, Global team leadership, PPA optimization, Advanced node implementation, Cross-functional collaboration, Organizational scaling
Preferred skills
High-performance computing domain experience, Methodology and flow development, Multi-geography management
Technologies
Synthesis, Place and Route, Timing closure, Physical verification, EDA tools, Advanced process nodes
Responsibilities
Own full lifecycle delivery from RTL through tape-out, Lead and scale large distributed engineering teams, Drive continuous improvement in cost and engineering efficiency, Enable adoption of advanced process nodes and methodologies, Partner with foundries and EDA vendors, Standardize ways of working across global teams
Seniority
Senior Director, strategic leadership & organizational scaling
