Analog IC Design
1,492 open positions
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CAD Gate-level 3DIC EM/IR Engineer AppleAustin, United States of America 5mo Develop and refine gate-level and transistor-level EM/IR methodologies and flows for Apple hardware designs.
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ASIC Link Modeling Technical Leader CiscoCarlsbad, California, US $189k–$189k5mo Develop system-level behavioral models and comprehensive link simulations for Cisco's silicon photonics systems, enabling performance analysis across high-speed SerDes, optical DSP, and die-to-die interfaces for next-generation 100G/200G/400G per Lambda…
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Advanced CMOS Device & Process Integration Engineer MicronHiroshima - Fab 15, Japan 5mo Developing and integrating advanced CMOS devices (FinFET, Nano-sheets, vertical GAA) for high-volume manufacturing in memory and storage solutions.
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Sr. ASIC Layout Design Engineer FlirUS - Goleta, CA $114k–$114k5mo Develop high-performance focal-plane array readout integrated circuits (ROICs) for infrared detectors, sensors, and cameras used in aerospace, defense, and scientific research.
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Global Commodity Manager – Photonics Components CienaOttawa $97k–$97k5mo Lead global commodity strategy and supplier ecosystem development for optical active photonic components to ensure cost-competitive, long-term supply assurance.
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Principle Product and Test Engineer ON SemiconductorAllen, TX, United States 5mo Design and productize automated test solutions for Analog, Mixed Signal, and Digital ICs to support new product development and execution in Automotive and Industrial markets.
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R&D Engineer Hardware 5 BroadcomUSA-CA San Jose Innovation Drive $141k–$141k5mo Design, develop, and deliver Ultra High-performance electronic products with full lifecycle ownership from conception to sustained high volume production.
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Senior Optical Signal Integrity / Power Integrity (SI/PI) Engineer Arista-NetworksSanta Clara, CA, us $150k–$230k5mo Lead the design, simulation, and validation of high-speed electrical interconnects and power delivery networks (PDNs) for next-generation optical modules and engines.
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Principal Signal Power Integrity Engineer, Texas Institute for Electronics UtaustinAUSTIN, TX 5mo Lead end-to-end Signal Integrity (SI) and Power Integrity (PI) simulations for advanced 2.5D/3.0D heterogeneous integration packages and multi-chiplet stacks.
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Analog Flash Design Engineer Texas InstrumentsBengaluru, Karnataka, India 5mo Design, development, and verification of analog and mixed-signal circuits for embedded Flash Memory IPs, including charge pumps, voltage regulators, sense amplifiers, and memory interfaces.
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System/Field Application Engineer MediaTekSan Jose, CA 5mo Supporting customer system bring-up, validation, and issue debugging across hardware, firmware, and SDK layers for high-speed interface products.
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Senior Standard Cell Library Design Manager IntelMalaysia, Penang 6mo Lead the development and optimization of standard cell libraries for Intel's Foundry Design Technology Platform to support product teams and external customers across all technology generations.
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Application Engineer (DDR5, SPDHUB/TS focus) MonolithicpowerChengdu - China 6mo Develop reference designs, custom PCBs, and prototypes for DDR5 SPD Hub products serving Data Center applications.
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Analog/Mixed-Signal IC Design Co-Op/Intern (Summer 2026) / Stage/Co-Op en Conception de CI Analogiques/Signal Mixte (Été 2026) CadenceMOUNT-ROYAL (Montreal) $0k–$0k6mo Co-op student investigates analog/mixed-signal IC design and simulation techniques on specific circuit blocks.
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SMTS Photonics Advanced Packaging Integration GlobalFoundriesUSA - Vermont - Essex Junction $107k–$107k6mo Lead the development and sustainment of advanced optical packaging solutions for silicon photonics (SiPh) and co-packaged optics (CPO) platforms, delivering scalable, low-loss architectures for AI, HPC, and data center applications.
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Senior Layout PCB Engineer EtchedaiHardware Engineering 6mo Designing and optimizing high-performance printed circuit boards (PCBs) for AI chips and data center hardware, focusing on high-speed signaling, power distribution, and complex HDI stack-ups.
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