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Software Engineering
› Hardware Verification
Hardware Verification
784 open positions
FE CPIE PI Principal/Staff Engineer
Micron
Boise, ID - ID1
4mo
Develop and optimize semiconductor manufacturing processes to drive rapid product maturity, improve yield, and standardize best-known methods across global DRAM and NAND sites.
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Senior Engineer, CAD
Micron
Hyderabad - Phoenix Aquila, India
4mo
Evaluating, improving, and debugging Electronic Design Automation (EDA) tools and flows to enable hardware verification and increase design team productivity.
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Senior Engineer, Design Verification Engineering
Analogdevices
US, TX, Dallas, Tollway
$117k–$117k
4mo
Senior Design Verification Engineer creating self-checking test benches and simulation environments to validate analog, digital, and mixed-signal IC designs before production.
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Senior Engineer, CAD
Micron
Hyderabad - Phoenix Aquila, India
4mo
Develop and optimize analog and digital circuit simulation flows to reduce pre-silicon failures and enhance productivity for memory and storage product development.
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Design Engineering Architect
Cadence
CORK 01
4mo
Technical leadership of complex Intellectual Property (IP) including UCIe, Ethernet, HBM, and PCIe for high-tech markets.
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Capacity Planner (Front-End)
ON Semiconductor
Bucheon-si, Gyeonggi-do, Korea, Republic of
4mo
Oversees long-term and short-term capacity forecasting, modeling, and system constraint solutions to optimize factory production plans and balance supply against demand for seamless customer delivery.
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Engineer - NAND Generators
Micron
Boise, ID - Main Site
4mo
Build NAND generators and ensure quality reticle generation tasks for tapeout processes.
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Instandhalter Backend (w/m/div.)
Bosch-Group
Dresden, SN, de
4mo
Performing scheduled maintenance, inspections, and troubleshooting on production machinery to ensure product quality and process stability.
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Principal Node Development Product Engineer, DPAG
Micron
Boise, Idaho, United States of America
4mo
Drive product readiness for next-generation DRAM by bridging process technology, product requirements, and manufacturing execution.
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Senior Engineer, Digital Design Engineering
Analogdevices
US, CO, Colorado Springs, Chapel Hills
$112k–$112k
4mo
Design and verify digital and mixed-signal integrated circuits (ASIC/FPGA) for industries including healthcare, aerospace, and defense.
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Principal Node Development Product Engineer, DPAG
Micron
Boise, ID - Main Site
4mo
Drive product readiness for next-generation DRAM by translating silicon behavior into actionable decisions across process, design, and manufacturing teams.
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Mixed-Signal Design Developer
Cisco
Kanata, Ontario, Canada
4mo
Architect, design, layout, measure, and productize ultra-deep sub-micron CMOS products for high-speed (>25Gb/s) and high-accuracy analog designs in optical communications.
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Principal Engineer, Frontend Central Product Integration Engineering (cPIE) Transformative HVB (high-value-bits)
Micron
Fab 10A, Singapore
4mo
Architecting data solutions and frameworks to identify and prioritize yield, quality, and reliability improvements in semiconductor manufacturing processes.
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Senior Manager, Front End Manufacturing Alignment
Micron
Boise, ID - ID1
4mo
Establish training, practices, and alignment programs to enable virtual clustered scale across the semiconductor manufacturing network, optimizing equipment utilization and reducing costs.
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Engineer - PIE YE
Micron
Fab 10N/X, Singapore
4mo
Analyze yield data and semiconductor device physics to resolve manufacturing yield issues in wafer fabrication processes.
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Design Verification Manager
Texas Instruments
Bengaluru, Karnataka, India
4mo
Driving SoC Design Verification (DV) and Analog Verification (AVnV) for high-growth markets including AI-driven data centers and humanoid systems.
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Software Database Engineer
Texas Instruments
Bengaluru, Karnataka, India
4mo
Design and development of new software tools, scripts, and interfaces for use in the PG (Pattern Generation) process.
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Lead Design Engineer
Cadence
PUNE 04
4mo
Define the strategic vision and infrastructure for verification of next-generation Tensilica advanced CPU cores and configurable processors.
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Sr Principal Product Engineer
Cadence
NOIDA
4mo
Sr Principal Product Engineer specializing in Static Timing Analysis (STA) tools and methodologies, acting as a bridge between customers and R&D to drive best-in-class timing signoff solutions.
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Senior Systems Software Engineer - Advanced Technology Group
NVIDIA
US, OR, Hillsboro
$152k–$152k
5mo
Developing industry-leading advanced computational methods for semiconductor manufacturing and design, leveraging GPUs to accelerate software solutions and improve yield/time-to-market.
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Front End Central Product Integration (FE cPIE) Principal Engineer/Senior Manager
Micron
Fab 10A, Singapore
5mo
Leading edge HBM Product yield, quality improvement, and new product introduction (NPI) through technical expertise and business process management.
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IC Packaging Simulation Engineer
Apple
Austin Metro Area, United States of America
5mo
Perform stress and deformation simulation of IC packages to ensure device yield and reliability, while developing automated model-generation tools using Gen-AI/ML.
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Front End Central Product Integration (FE cPIE) Principal Engineer/Senior Manager
Micron
Singapore, Singapore
5mo
Drive leading edge HBM product yield, quality improvement, and new product introduction (NPI) through technical expertise and business process management.
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Staff Engineer, TEM
Micron
Fab 10N/X, Singapore
5mo
Develop and apply advanced Transmission Electron Microscope (TEM) characterization methods for atomic-scale device analysis in next-generation memory technology.
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Senior Applications Engineer - Emulation
Siemens-Eda
Costa Mesa, CA, United States
$167k–$167k
5mo
Deploying emulation software and hardware solutions at customer sites, guiding them through successful design bring-up, and refining prototyping methodologies.
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Field Applications Engineer - Processor (Tokyo)
Texas Instruments
Japan
5mo
Drive revenue growth for processor products by partnering with sales teams to provide technical expertise and custom solutions to customers.
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Applied Machine Learning Engineer, Circuit Design - New College Grad 2026
NVIDIA
US, CA, Santa Clara
$116k–$116k
5mo
Building AI-driven software systems for circuit design using automation algorithms, deep learning models, and agentic workflows to accelerate end-to-end design automation.
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Performance Modeling Software Engineer, Platform Architecture
Apple
Beaverton, United States of America
5mo
Develop high-performance C++ software models and infrastructure for system-on-chip (SoC) performance analysis, enabling hardware architects to iterate on chip-level designs.
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PRINCIPLE SOFTWARE ENGINEER
Cadence
ZHUBEI 01
5mo
Developing EDA software using C/C++ and Python to solve complex technology challenges.
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Frontend Central Process Integration Senior Engineer
Micron
Boise, ID - ID1
5mo
Drive best-in-class product maturity, yield, and quality for global DRAM and NAND manufacturing by identifying, aligning, and deploying optimized process integration solutions across the network.
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Front End Central Product Integration (FE cPIE) Senior Manager
Micron
Taichung - Fab 16, Taiwan
5mo
Lead PI loop structural uniformity integration and cross loop integration projects for critical loops such as Capacitance loop to address yield and quality challenges in semiconductor manufacturing.
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Software Architect, Physical Verification
Cadence
SAN JOSE
$179k–$332k
5mo
Design, develop, and implement robust software for physical verification of advanced semiconductor devices, solving complex mathematical and geometric challenges.
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FE Central Product Integration Engineering (CPIE) Senior/ Staff Engineer
Micron
Taoyuan - Fab 11, Taiwan
5mo
Drive global project management and execution to improve benchmark performance, efficiency, and yield in memory and storage manufacturing processes.
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Staff Engineer - Design Verification
Micron
Hyderabad - Phoenix Aquila, India
5mo
Lead design verification activities for DRAM products, leveraging AI-based tools and automation to accelerate verification cycles and improve debug efficiency.
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Engineer, DEG Mobile DRAM Verification
Micron
Hyderabad - Phoenix Aquila, India
5mo
Senior Verification Engineer responsible for end-to-end analysis and verification of sophisticated full-chip gate-level custom designs for DDR5, LPDDR5, DDR6, and LPDDR6 memory architectures operating at speeds up to 9600MT/s.
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Senior Engineer - Design Verification
Micron
Hyderabad - Phoenix Aquila, India
5mo
Develop and maintain verification activities for DRAM design, focusing on accelerating verification cycles and improving debug efficiency using AI-based tools and automation frameworks.
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CAD Flow Automation and AI Engineer
Apple
Sunnyvale, United States of America
5mo
Design and manufacture next-generation, high-performance, power-efficient processor and system-on-chip (SoC) to fuel Apple devices.
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Physical Design Backend STA Engineer
NVIDIA
Israel, Yokneam
5mo
Perform advanced Static Timing Analysis (STA) at chiplet and FC level to ensure timing convergence and quality approval for high-speed communication devices.
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Senior DFT Consultant (Tessent)
Siemens-Eda
Remote
$147k–$293k
5mo
Design for Test Consultant supporting the use of Tessent DFT software in the design of complex ASIC designs, implementing and verifying DFT features for enterprise customers.
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CAD Engineer - Circuit Simulation Methodology
Apple
Austin, United States of America
5mo
Developing and refining custom transistor-level simulation and EM/IR analysis methodologies to support scalable circuit verification solutions.
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Lead Software Engineer ( Verification )
Cadence
BANGALORE
5mo
Developing Cadence software-driven verification solutions for electronic design architectures and IPs.
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GenAI Physical Synthesis Engineer
Apple
Santa Clara, United States of America
5mo
Develop GenAI-powered agentic applications to automate and optimize RTL-to-GDS physical synthesis flows for Apple processors and SoCs.
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Software Intern
Cadence
SAN JOSE
$0k–$0k
5mo
Software intern role focused on research and development of on-chip in parasitic modeling using state-of-the-art machine learning technologies.
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Principal/Senior Principal Engineer – Arm ARM
Arm
Cambridge, United Kingdom
5mo
Lead the delivery and evolution of the Arm Architecture Reference Manual (Arm ARM), ensuring architectural intent is accurately communicated and the product maintains high quality, correctness, and accessibility.
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CAD Flow Automation and AI Engineer
Apple
Sunnyvale, United States of America
5mo
Design and manufacture next-generation, high-performance, power-efficient processor and system-on-chip (SoC) for Apple devices.
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Senior/Staff Engineer, Frontend Labor Productivity & Data Engineering
Micron
Hiroshima - Fab 15, Japan
5mo
Drive measurable outcomes in labor productivity and annualized hour savings by implementing strategies focused on standardization, simplification, automation, and leveraging generative AI methodologies.
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Virtuoso Custom CAD Engineer
Apple
Beaverton, United States of America
5mo
Provide engineering support for digital, analog, and mixed-signal IC designs using Cadence tools to enable Apple's high-performance display and image sensors.
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Full Stack Software Engineer
Apple
Cupertino, United States of America
5mo
Design and build highly available web applications and data visualization frameworks for tracking, triaging, and debugging chip design workflows.
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Engineer, Process Development (Core Engineering Module)
Micron
MSB, Singapore
5mo
Engineer responsible for integrating AI tools into daily work, executing NPI product qualifications, and leading continuous improvement of assembly processes to ensure high yield and cost efficiency in semiconductor manufacturing.
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Package Development Engineering – Product Integration Engineer (PDE PIE)
Micron
MSB, Singapore
5mo
Integrate AI-assisted tools into daily work, drive New Product Introduction (NPI) processes, and act as a technical integrator across manufacturing sites to bring new semiconductor packages into volume production.
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