ASIC Verification Engineering
1,075 open positions
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Design Verification Engineer - technical lead, Annapurna Labs
AmazonToronto, Ontario, Canada
$139k–$231k1mo
Architect and implement end-to-end verification strategies for high-speed I/O and scale-up/out components across the SoC, ensuring thorough coverage of hardware-software interfaces and cross-module functionality for AWS Inferentia and Trainium systems.
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DFT ASIC Engineering Technical Leader | ATPG | 10 to 14 years | Bangalore CiscoBangalore, India 1mo Lead and mentor a team of DFT engineers to design and implement innovative DFT features ensuring high-quality, testable, and manufacturable silicon designs for next-generation network devices.
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Senior FC Verification & Simulation Infrastructure Engineer NVIDIAIsrael, Yokneam 1mo Develop and verify next-generation Network Interface Cards (NICs) at the system level while building and optimizing the simulation infrastructure for verification flows.
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Digital Verification Engineer NeuralinkSouth San Francisco - SSF $131k–$131k1mo ASIC Design Verification Engineer for System-on-Chip (SoC) in Neuralink's Implant Team, focusing on high-throughput low-power digital signal processing (DSP) for brain-computer interfaces.
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Senior SOC Debug Verification Engineer MicrosoftIndia, Karnataka, Bangalore 1mo Own verification of Design for Debug (DFD) SoC level flows, develop verification strategies and environments, run tests, debug failures to root cause, and support post-silicon validation.
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Senior Design Verification Engineer – High Performance CPU Core SiFiveAustin, Texas, United States 1mo Drive functional verification of high-performance out-of-order CPU core units, ensuring design intent is verified correctly and risks are identified early.
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Design Verification Engineer Texas InstrumentsKnoxville, TN, United States 1mo Develop and execute verification strategies to ensure first-pass silicon success for next-generation analog and mixed-signal ICs.
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Mixed Signal Design Verification Engineer AnalogdevicesUS, MA, Wilmington $87k–$87k1mo Develop analog circuit and system models to verify functionality and connectivity of mixed-signal SoCs for advanced wireless applications.
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Design Verification Engineer BroadcomUSA-CO Broomfield $144k–$144k1mo Define verification plans and environment architecture, develop test cases and bench components, perform coverage analysis/closure, and debug complex digital and mixed-signal IP blocks for Broadcom ASICs.
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GPU Design Verification Engineer AppleLondon, United Kingdom 1mo Pre-silicon RTL verification of blocks in high performance 3D graphics processor microarchitectures for low power mobile devices and high-performance PCs.
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Tech Lead, Formal Verification AsteralabsBengaluru 1mo Lead formal verification efforts for complex IP and SoC designs to ensure first-pass silicon success for next-generation connectivity and AI infrastructure products.
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Staff Design and Verification Engineer, Pathfinding Micron3 Locations $116k–$116k1mo Design and verification of next-generation memory technologies, spanning full-chip functional verification, array architecture definition, and mixed-signal circuit development.
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Emulation-Prototyping Senior Engineer↗ Openchip & Software Technologies 1mo Develop and maintain design frameworks, emulation platforms, and prototyping environments to accelerate silicon validation, system bring-up, and hardware-software co-design.
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?Software Engineer Test & Verification (all gender) Remote 1mo Define requirements for PLD/FPGA tests and test equipment, create verification documentation for complex aerospace systems, and develop/execute verification tool qualifications.
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Senior Design Verification Engineer ON SemiconductorBangalore, Karnataka, India 1mo Develop IP for next generation Automotive, Industrial & Medical products, including complex mix-signal IPs and analog blocks like DACs, ADCs, PLL, and wireless interfaces.
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Staff Design Verification Engineer, AI HW TenstorrentSanta Clara $100k–$100k2mo Validating custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI.
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Functional Verification Engineer AccentureBengaluru 2mo Develop and execute testbenches to verify the functional correctness of DDR4/DDR5 digital designs at the block and system level.
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Principal Digital Engineer Renesas-ElectronicsAustin, TEXAS, us 2mo Define scalable verification and validation methodologies for advanced digital power management products used in AI, datacenter, and high-performance computing applications.
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Principal Engineer, Design Verification MarvellHo Chi Minh $0k–$0k2mo Verify circuitry for innovative storage technologies including ultra-fast read channels, high-performance processors, and transceivers for HDD and SSD electronics markets.
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Senior Field Application Engineer Prototyping Siemens-EdaHsinchu, TWN, Taiwan 2mo Senior Applications Engineer providing hands-on technical leadership for pre-sales and post-sales support of Hardware Assisted Verification (HAV) solutions, specifically focusing on FPGA prototyping and emulation for digital chip design.
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Design Verification Engineer AlteraRegus, Madhapur 2mo Develops, validates, and debugs software abstractions and frameworks for FPGA acceleration to support embedded, data center, and communication clients.
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Senior AMS Verification leader NxpMilan $61k–$61k2mo Lead mixed-signal verification activities for advanced automotive and industrial power management products, defining strategies and ensuring robust silicon delivery.
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