ASIC Physical Design
1,647 open positions
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Sr. ASIC Design Engineer HpeRoseville, California, United States of America $154k–$311k4mo Design high-speed ASICs from functional specifications to final netlist for cutting-edge networking chips used in routers and switches.
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Lead Logic Design Engineer NxpBangalore 4mo Translate system-level requirements into hardware block specifications and perform digital design and RTL coding for high-speed data paths and control blocks.
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Staff FPGA Engineer (Future Forward) IntuitiveSunnyvale, CA, us 4mo Design, implement, and test complex FPGA designs for electronic boards in robotic surgical systems, integrating them into complete solutions for human use.
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CPU Physical Design and Integration Engineer AppleSanta Clara, United States of America 4mo Physical design, integration, and verification of high-performance, low-power processor development.
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Digital IC Designer for Image Processing MediaTekChuPei 5mo Developing picture quality and image processing technologies for MediaTek's TV, mobile, and automotive product lines.
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Staff Engineer, GPU RTL Power Management Samsung Electronics3900 N Capital of Texas Hwy, Austin, TX, USA $151k–$151k5mo Design and develop power management/SoC interface RTL blocks and subsystems for next-generation mobile GPU IPs to enable high-performance computing devices.
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ASIC Technical Program Manager EtchedSan Jose 5mo Own program coordination across Physical Design, DFT, DV, and RTL teams for ASIC development cycles, managing external vendors and driving technical execution for tape-outs.
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Architect/Staff Embedded Software Engineer OlixLondon, UK 5mo Architect/Staff Embedded Software Engineer defining hardware-software integration architecture for the DX-1 decode accelerator, spanning ASIC, BMC, and high-speed interconnect fabric.
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ASIC Physical Design Engineer CiscoArmenia 5mo Lead macro-level RTL-to-GDSII physical implementation and signoff for complex SoC and block-level projects, translating architecture into optimal physical design.
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?Softwareentwickler FPGA (d/w/m) Konstanz, BADEN_WUERTTEMBERG 5mo Design, implementation, and documentation of FPGAs for image processing and communication applications.
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Director Applications Engineering Silicon ArmMultiple locations $323k–$323k5mo Lead a global Silicon FAE organization to deliver customer outcomes from evaluation through deployment for Arm's silicon products.
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ASIC Implementation Engineer BroadcomUSA-CA San Jose Innovation Drive $120k–$120k5mo Physical Design Engineer responsible for taking Netlist to silicon tape-out for next-generation AI designs.
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Quantitative Technologist (Full-Time - FPGA Engineer, PhD) RadixuniversityRadix Trading Chicago 5mo Design and build scalable FPGA systems to improve performance and latency for automated trading.
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Physical Design Intern MarvellCordoba, Argentina 5mo Implement tool flows, develop CAD methodologies, and generate scripts for ASIC physical design tasks including place and route, timing closure, and backend activities.
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Staff Digital Engineer SemtechIND - Hyderabad 5mo Define, develop, verify, and optimize complex digital circuits for low-power mixed-signal ICs, collaborating on system specifications and supporting silicon evaluation.
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Senior Staff Engineer, Digital Design Renesas-ElectronicsBengaluru, KA, in 5mo Design of optimized digital blocks meeting functional, cost, and low power constraints for mixed-signal integrated circuits.
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Senior FPGA IP Solution Design Engineer AlteraPenang 15, Penang, Malaysia 5mo Designing, developing, and verifying wireless IP cores for FPGA platforms to deliver high-performance wireless solutions.
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Senior AI Chip Design Engineer NVIDIAIsrael, Tel Aviv 5mo Develop AI-powered methodologies and applications to improve productivity, quality, and turnaround across the chip design flow.
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