ASIC Verification Engineering
1,069 open positions
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Verification Engineer | Core Engineering JumptradingBristol 11d Design, develop, and validate complex ASIC/SoC designs for a global trading platform, ensuring robust hardware and software integration.
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Wireless PHY Design Verification Engineer AppleSunnyvale, United States of America 11d Verify sophisticated WiFi PHY digital systems for high-rate, low-power, low-latency wireless features in Apple's SoCs.
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Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification) SiFiveBengaluru, Karnataka, India 11d Own verification planning and execution for Vector, ALU, and floating-point blocks in CPU cores, driving strategy from unit level to core level integration.
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Senior DFT Methodology Engineer NVIDIAUS, CA, Santa Clara $168k–$168k11d Architect and develop test methodologies to make next-generation silicon testable, debuggable, and secure from the first bring-up.
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ASIC Design Verification Eng II Full Time - United States CiscoSan Jose, California, US $112k–$112k11d Develop and verify ASICs for Cisco's core Switching, Routing, and Wireless products using simulation, emulation, and bring-up processes.
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芯片应用工程师 HuaweiDongguan, China 11d System-level and module-level verification of CPU/GPU/NPU/network chips, plus AI chip architecture design and optimization for high performance and low power.
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Director, Digital Design & Verification Renesas-ElectronicsChandler, Arizona, us 12d Lead end-to-end digital design and verification for complex mixed-signal SoCs, ensuring high first-pass silicon success and predictable delivery across automotive, industrial, and IoT programs.
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Internship Performance Analyzis and Optimization of Python-Based Verification for C++ Models Bosch-GroupKusterdingen, BW, de 12d Analyze and optimize the performance of Python-based verification environments for C++ models in industrial hardware verification.
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ASIC Design for Test (DFT) Engineer (Remote)↗ Asic North, Inc.Remote $100k–$100k12d Architect and implement Design for Test (DFT) structures for block and chip-level ASIC designs to ensure test coverage and timing validation.
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FPGA Silicon Design Verification Engineer AlteraBengaluru, Karnataka, India 12d Create comprehensive verification plans and execute IP verification tasks for FPGA architectures, focusing on PCIe IP design.
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Design For Test Intern, MS - Summer 2027 MarvellSanta Clara, CA $62k–$123k12d Intern role focused on Design for Test (DFT) architecture, methodology, and verification flows for complex SoC designs in the data center, enterprise, wireless, and automotive markets.
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CPU Pre-Silicon Verification Lead IntelIndia, Bangalore 12d Lead pre-silicon functional verification for Intel's latest CPU cores using world-leading process technologies to ensure design requirements are met before silicon fabrication.
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Applications Engineering, Sr Staff Engineer↗ SynopsysRemote $157k–$157k12d Sr Staff Applications Engineer deploying and optimizing hardware emulation platforms (ZeBu, Palladium, Veloce) for customer ASIC/SoC verification environments.
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DFT Engineer NxpTianjin (Teda) 12d Implement and verify DFT solutions (Scan, MBIST, Boundary Scan) for complex SoC designs to ensure testability and design quality.
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Senior Design Verification Engineer MicrosoftUnited States, California, Mountain View 12d Plan and execute verification of complex design IP, creating constrained-random environments and formal verification to ensure functional correctness before tape out.
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Midcore Design Verification Engineer TenstorrentRemote $100k–$100k13d Verify high-performance out-of-order RISC-V CPU cores by developing test strategies, building test environments, and debugging complex processor behaviors.
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Design Verification Architect / Director CadenceSAN JOSE, US $186k–$186k13d Lead the Processor Verification team to verify microprocessor cores and their peripherals, including crafting verification plans and executing them for complex CPU designs.
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DFT&PostSiliconValidation↗ SemidynamicsBarcelona, CT, ES 13d Define and implement DFT architectures and test strategies to ensure testability, debug capabilities, and manufacturability for high-performance SoCs or SiPs.
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Senior Methodologist for AIML Enhanced Design/Verification HpeSunnyvale, California, United States of America $174k–$353k13d Develop and execute verification strategies for complex digital designs using AIML (AI/ML) enhanced methodologies to ensure silicon quality from RTL to tapeout.
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Senior Solution Architect↗ HCLTechGuanajuato, GUA, MX 13d Lead end-to-end ASIC/SoC verification strategy, architecture, and execution for next-generation semiconductor products, ensuring first-pass silicon success.
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SOC Design Verification Engineer – Data Center Solutions↗ QualcommSan Diego, CA, US $116k–$116k13d Verify next-generation Data Center SoCs powering AI, high-performance computing, and cloud infrastructure products.
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Senior Staff Engineer Digital Verification (f/m/div)↗ Infineon TechnologiesVillach, K, AT 14d Define verification plans and create/improve verification environments for digital and digital mixed-signal designs.
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Sr Design Verification Engineer, DRAM MicronBoise, ID - Main Site 14d Verify and optimize digital and analog circuit designs for next-generation memory technologies to ensure manufacturability and performance.
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MTS - IP Engineering GlobalFoundriesNetherlands $69k–$69k14d Develop and deliver high-performance compute processor IP products from concept through implementation, verification, and signoff.
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