ASIC Physical Design
1,648 open positions
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Graphics FE Implementation Engineer AppleAustin, United States of America 10mo Generating netlists from RTL designs for GPU implementation on Apple Silicon.
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Lead Architect, Custom Silicon GlobalFoundriesUSA - Texas - Richardson $132k–$132k11mo Define and drive the architecture of next-generation custom silicon solutions, including complex ASICs and SoCs, from concept through tape-out.
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CPU Physical Design Engineer_HsinChu MediaTekHsinChu 11mo Deliver highly competitive ARM based CPU IP.
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System Performance Analysis Engineer ArmSophia Antipolis, France 11mo Investigate performance bottlenecks and optimize future Arm-based System-on-Chips (SoCs) by analyzing CPU, interconnect, memory, and I/O interactions in pre-silicon environments.
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SOC IP RTL Development Engineer Samsung Electronics 11mo Designing high-speed serial interface IP blocks for System LSI and Mobile SoCs.
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Sr Principal Design Engineer CadenceBANGALORE 1y Design, implement, and verify RTL for PCIe controllers and related subsystems, ensuring protocol compliance and performance targets.
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Research Associate (IC Design) NtuNTU Main Campus, Singapore 1y Integrate Hardware AES and ASCON accelerators into the RISC-V CVA6 core, including custom instruction definition, toolchain modification, and verification.
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Senior Chip Design Engineer NVIDIAIsrael, Tel Aviv 1y Design and implement next-generation high-speed Switch Silicon chips, focusing on RTL units and blocks to deliver high throughput and low latency.
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Physical Design Engineer EtchedSan Jose 1y Own block-level implementation and verification, drive timing closure and PPA optimization for ASIC infrastructure focused on inference workloads.
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